1. Field of the Invention
The present invention relates to a method and a system of predicting the reliability of a semiconductor device in which the early-life failure of the semiconductor device is predicted.
2. Description of the Related Art
The reliability of a semiconductor device such as a large scale integration (LSI) is divided into the following three parts: early-life failures occurring in an earlier stage after the device started to be used (operated); random failures occurring over a long period of use after that; and wear-out failures increasing with an intrinsic lifetime (service life) of a device.
Early-life failures occur due to a latent defect attributed to a manufacturing process being deteriorated by stress during use. A defect is formed in a chip due to a minute foreign particle adhering in a manufacturing process as a latent defect and results in failure of a device. Only a device having a latent defect fails and is gradually removed, hence a failure rate tends to decrease with time. Decreasing an early-life failure rate realizes a highly reliable semiconductor device.
The period of early-life failures is generally defined as half a year to one year. Screening such as a stress testing and a burn-in testing is introduced into a process to decrease a failure probability during an early-life failure period and improve quality.
A method of predicting an early-life failure rate of a semiconductor device is described in the reference of T. S. Barnett, et al. IEEE Trans. on Reliability vol. 52, p. 296 (2003). In this method, modeling for a relationship between evaluated reliability and yield for a product (semiconductor device) the design of which has been finished is performed. The early-life failure rate of the product can be predicted from the model and the yield of the product.
Incidentally, a method for designing a product in consideration of only the yield of the semiconductor device is described in Japanese Patent Laid-Open No. 2007-123894.